1. Technical Field
Various embodiments relate generally to a semiconductor device and a method of manufacturing the same and, more particularly, to a three-dimensional semiconductor device and a method of manufacturing the same.
2. Related Art
A three-dimensional (3D) semiconductor device includes memory cells that are stacked in a plurality of layers. The 3D semiconductor device may increase a degree of integration as compared to a two-dimensional semiconductor device that includes memory cells arranged in a single layer over a substrate.
A three-dimensional semiconductor device may include a stacked structure that is separated by a slit. The stacked structure may include conductive patterns and insulating patterns that are alternately stacked over a substrate. In order to increase the degree of integration of the 3D semiconductor device, the number of memory cells, which are stacked over the substrate, may be increased. As the number of memory cells stacked increases, the number of conductive patterns and insulating patterns that constitute the stacked structure may also increase. However, when the slit is formed in order to separate the stacked structure, the stacked structure may lean due to a high aspect ratio of the stacked structure. As a result, it may be difficult to ensure reliability of the 3D semiconductor device, and manufacturing processes thereof may become difficult.
In accordance with an embodiment of the present invention, a memory system comprises: a memory controller; and a memory device coupled to the memory controller, wherein the memory device comprises: stacked groups each including interlayer insulating patterns and conductive patterns and stacked in at least two tiers, wherein the insulating patterns and the conductive patterns are alternately stacked over a substrate and separated by slits; and a support body including holes is formed between the stacked groups.